Russell, Gordon and Shaw, Paul (1993) An object-based processor cache. Technical Report. University of Strathclyde.

Preview

PDF Available under License Creative Commons Attribution Non-commercial. Download (70kB) | Preview

Abstract/Description

In the past, many persistent object-oriented architecture designs have been based on traditional processor technologies. Such architectures invariantly attempt to insert an object-level abstraction mechanism over the traditional processorÕs virtual addressing scheme; this results in an architecture which incurs a translation overhead on every object access. Other architectures use objects at the instruction level, but then use a virtual -based caching scheme. This may require bounds-checking, and even object-to-virtual translation, to be performed on every object access. A new architecture, DAIS, is proposed which utilizes objects in instructions and in the caches. This paper presents a short history of persistence, analyses a number of persistent architectures, and presents the DAIS design strategy. The object-based caching mechanism of DAIS is described, involving topics such as object protection via tag bits, object- and page-based locking, range checking, object to virtual mapping function, and use of a secondary descriptor cache. The cache design results in a processor which is no slower than conventional processors based on virtual memory. The design is then extensively analysed for performance with differing cache sizes. This analysis indicates that using a secondary descriptor cache can increase performance by 21% over a system with instruction and data caches alone.

Actions (login required)