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An evolutionary approach for symmetrical field programmable gate array placement.

Yang, Meng, Almaini, A E A, Wang, Lun Yao and Wang, P (2005) An evolutionary approach for symmetrical field programmable gate array placement. In: Research in Microelectronics and Electronics, 2005 PhD. Conference Proceedings, 1 . IEEE, pp. 169-172. ISBN 0-7803-9345-7

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Abstract/Description

An evolutionary computation method is used to place a set of different Microelectronics Center of North Carolina (MCNC) benchmark circuits on traditional symmetrical Field Programmable Gate Array (FPGA). The experimental results are compared to the state-of-the-art results from Versatile Placement and Routing (VPR). The proposed algorithm achieves promising performance, in terms of routing channel density.

Item Type: Book Section
ISBN: 0-7803-9345-7
Additional Information: Paper presented at Ph.D. Research in Microelectronics and Electronics, held in Lausanne, Switzerland, on the 25th-28th July 2005.
Uncontrolled Keywords: Evolutionary compuring; Field Programmable Gate Arrays; MCNC; Benchmark circuits; Versatile Placement and Routing; Routing channel density;
University Divisions/Research Centres: Faculty of Engineering, Computing and Creative Industries > School of Engineering and the Built Environment
Dewey Decimal Subjects: 600 Technology > 620 Engineering > 621 Electronic & mechanical engineering > 621.3 Electrical & electronic engineering > 621.38 Electronics & Communications engineering
000 Computer science, information & general works > 000 Computer science, knowledge & systems > 004 Data processing & computer science > 004.2 Systems analysis, design & performance
Library of Congress Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Q Science > QA Mathematics > QA75 Electronic computers. Computer science
Item ID: 2573
Depositing User: Users 10 not found.
Date Deposited: 08 May 2009 12:21
Last Modified: 24 Oct 2014 13:15
URI: http://researchrepository.napier.ac.uk/id/eprint/2573

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